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Chapter 5: Arithmetic and Logic Instructions

5-1 ADDITION, SUBTRACTION AND COMPARISON

Addition

add 指令

  • ADD
  • ADC - add-with-carry
  • 只有 memory-to-memory and segment register 不能 ADD
    • segment registers can only be moved, pushed, or popped
  • INC - Increment, +1

Register Addition

  • 当算数和逻辑指令执行时，contents of the flag register change
    • interrupt, trap, and other flags do not change
  • 任何 add 指令都会改变这些 flag: sign, zero, carry, auxiliary carry, parity, and overflow flags

Immediate Addition - ADD DL, 33H

Memory-to-Register Addition - AD AL, [DI]

Array Addition

alt text

Increment Addition - preserving the state of the CF flag alt text * indirect memory increments - 必须指定数据长度

Exchange and Add for the 80486 Core2 Processors

  • XADD - 先交换 dst 和 src，再完成加法 des = src + des
    • 用来实现乐观锁（optimistic locking）- 提交时检测冲突
  • int atomic_xadd (atomic_t *v, int inc)
  • 例子：多线程更新
.data 
version     DD  0               ; shared version number initialized to 0 

.code 
            MOV   ECX, version  ; load the current value of version 
            ......              ; working optimistically 
            MOV   EAX, 1        ; EAX = 1 
            XADD version, EAX   ; version ⇔ EAX, version = version+1  
            CMP   EAX, ECX      ; check if the value was modified by  
                                ; another thread 
            JNE    retry        ; if version was updated then rollback 
            ...... 
rollback:   ......              ; handle the conflict

Subtraction

  • DEC - 修改除 CF flag 之外的所有 flag
  • SBB - subtract-with-borrow instruction

Compare

The comparison instruction (CMP) is a subtraction that changes only the flag bits

CMP A, B - 根据 A-B 的结果改变 flag

Compare and Exchange (80486 Core2 Processors Only)

  • int atomic_cmpxchg (atomic_t *v, int new, int old)
  • CMPXCHG CX,DX (AX)
    • CX == AX, CX = DX, ZF =1
    • CX <> AX, AX = CX, ZF =0
    • CX, DX, AX 分别是 atomic value, new value, old value
    • 如果新值和老值相同，说明当前线程并未被打扰，可以更新

5-2 MULTIPLICATION AND DIVISION

Multiplication

  • MUL (unsigned integer)
  • IMUL (signed)
  • AL/AX/EAX register as an implicit operand
  • e.g., MUL CL ; AX = AL*CL
  • 乘积的位宽是乘数的两倍
  • 32-bit product appears in DX–AX
    • DX 放高位，AX 放低位
  • 64 bit product is found in EDX–EAX, In the Pentium 4 RDX:RAX
  • flag set: alt textalt text

Division

  • no immediate division instruction
  • two types of errors - 除零和溢出（小数除以大数），触发 interrupt
  • alt text
  • Quotient is positive or negative; remainder always assumes sign of the dividend (向零舍入)
    • 16 / -3 = -5……1
    • -16 / 3 = -5……-1
  • alt text
  • 64 位 - EAX & EBX

signed extension

  • CBW/CWDE/CDQE - AX -> RAX
  • CWD/CDQ/CQO - AX -> DX:AX
  • MOVSX/MOVSXD - sign extension
  • MOVZX - zero extending

5-3 BCD and ASCII Arithmetic

感觉不重要，先略

AAA (ASCII adjust after addition)

  • add two unpacked BCD numbers
  • AL register is the implied source and destination
  • 把 AL 转换成 unpacked BCD
MOV AL,'3'
ADD AL,'4' # AL = 0x67
AAA # AL = 0x07, AH = 0x00, AF/CF 被置 0

MOV   AX,  '1'       ;    AL = 0x31 (ASCII for '1') 
ADD    AL,  '9'       ;    AL = 0x6A 
                               ;    ASCII result for ‘1' + ‘9' = 0x31 + 0x39 = 0x6A 
AAA                       ;    AH = 1,  AL = 0,  CF = 1 and AF = 1

5-4 BASIC LOGIC INSTRUCTIONS

AND, OR, Exclusive-OR, and NOT

  • TEST, a special form of the AND instruction
    • only affects the condition of the flag register
    • the same manner as a CMPalt text
    • TEST same,same - 判断和 0 的大小
  • NEG, similar to the NOT
    • NOT - logical
    • NEG - arithmetic
    • 当且仅当操作数为 0，NEG 指令置 zero flag 为 0，否则为 1
  • 除 NOT 指令外，其他指令会改变 flag
    • clear the OF and CF flags
    • change the SF, ZF, and PF flags to reflect the result
    • the state of the AF flag is undefined

Shift and Rotate

  • SHL AX, 4 - logical
  • SAL - arithmetic
  • SHR/SAR